This invention relates to the field of computer systems. More particularly, a system and method are provided for verifying the receive path of an input/output subsystem or component.
Before releasing a communication component or device, such as a network interface circuit, communication bus, disk controller, and so on, it is essential to verify its proper operation.
Traditionally, to test the operation of a communication component a set of predetermined inputs or stimuli would be applied to the component in a strict order and the output of the component would be examined, or hooks would be placed in the component being tested, to determine if it had processed the input in an expected manner.
For example, to test the transmit path of the component, a predetermined set of data having known attributes would be used as input, and would be designed to test just a small subset of the component's functionality. Different static sets of input would have to be used to test other functionality. To test the component's receive path, data rates into and out of the component would be matched to ensure that testing is not disturbed by data being dropped.
In both scenarios, the testing environments do not reflect actual operating environments. In live operation of an input/output component or device, it will almost certainly receive for transmission data patterns that have a far wider range of attributes than the predetermined static stimuli applied during verification. Further, communication data rates on one side of the component (e.g., between the component and a host) are unlikely to consistently closely match rates on the other side (e.g., between the component and a network other communication link). Thus, traditional verification environments and methods often fail to adequately test input/output components.